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| 商品規格 |
| 輸出電壓 | 5V |
| 輸出電流 | 6A |
| 輸出數 | 1 Output |
| 最高輸入電壓 | 36 V |
| 最小輸入電壓 | 3.5 V |
| 交換頻率 | 220 kHz to 2.2 MHz |
| 靜止電流 | 25 uA |
| 適用溫度 |
-40°C~+125°C |
| RoHS | 詳細資料 |
| PIN | Name | FUNCTION |
| 1 | OUT | Switching Regulator Output. OUT also provides power to the internal circuitry under certain conditions (see the Linear Regulator Output (BIAS) section for details). |
| 2 | RESET | Open-Drain, Active-Low RESET Output. To obtain a logic signal, pullup RESET with an external resistor. |
| 3 | BST | High-Side Driver Supply. Connect a 0.1μF capacitor between LX and BST for proper operation. |
| 4, 5,7, 8 | PGND | Power Ground. Connect all PGND pins together. |
| 6 | LX | Inductor Connection. Connect LX to the switched side of the inductor. |
| 9 | SUPSW | Internal High-Side Switch Supply Input. SUPSW provides power to the internal switch. Bypass SUPSW to PGND with 0.1μF and 4.7μF ceramic capacitors. Place the 0.1μF capacitor as close as possible to the SUPSW and PGND pins, followed by the 4.7μF capacitor. |
| 10 |
SUP | Voltage Supply Input. SUP supplies the internal linear regulator. Connect SUP directly to SUPSW as close as possible to the IC. SUP and SUPSW are connected together internally. |
| 11 | EN | SUP Voltage-Compatible Enable Input. Drive EN low to disable the device. Drive EN high to enable the devices. |
| 12 | SYNC | Connect SYNC to GND or leave unconnected to enable skip-mode operation under light loads. Connect SYNC to BIAS or to an external clock to enable fixed-frequency forced-PWM-mode operation. When driving SYNC externally, do not exceed the BIAS or OUT voltage. |
| 13 | BIAS | Linear Regulator Output. BIAS supplies the internal circuitry. Bypass with a minimum of a 2.2μF ceramic capacitor to ground. The BIAS pin can transition from 5V to VOUT after startup. |
| 14 | GND | Analog Ground |
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